The present invention relates to a transistorized amplifier and more particularly to a low level amplifier implementable with single channel field effect transistors. The disclosed amplifier may be used as part of an electronic calculator system and may be implemented on at least one electronic calculator chip having a large number of digital logic gates implemented thereon in addition to the amplifier.
Conventionally, low level amplifiers e.g., amplifiers responding to input signals having a magnitude on the order of 5 millivolts, have been implemented with conventional bipolar transistors; however, amplifiers utilizing discrete field effect transistors (FET's) are also known in the prior art. FET's exhibit relatively wide parametric variation; for instance, their threshold voltage (V.sub.t) may vary between -1.3 and -2.3 volts or more. Since discrete FET's may be typed according to the measured characteristics of the FET as manufactured, by appropriately selecting the type of FET used in a discrete amplifier, the problems associated with FET parametric variation are largely accounted for.
In the amplifier disclosed, however, the amplifier is used as part of a predominantly digital FET MOS chip of the type preferably used in an electronic calculator. The amplifier is used in the chip to step up low level signals (approximately 10 mv peak to peak) received from a magnetic card reading coil to more normal logic levels. This amplifier typically occupies only a small portion of the chip on which a great majority of the transistors are used in digital logic circuits. The wide parametric variation associated with field effect transistors which causes the threshold voltage (V.sub.t) to vary between -1.3 to -2.3 volts DC does not appreciably effect digital circuits having logic levels on the order of several volts. However, it should be evident that such a change in threshold voltage would normally significantly effect the operation of a low level amplifier. Since it is not practical to use discrete FET's to implement an amplifier in an electronic calculator or to discard chips because they exhibit an unacceptably high or unacceptably low threshold voltage, a low level amplifier which is relatively insensitive to variations in FET threshold voltages eliminates the waste associated with discarding chips having high or low threshold voltages or the expense associated with using discrete devices to implement a low level amplifier in an electronic calculator.
It is, therefore, an object of this invention to improve low level FET amplifiers.
It is yet another object of this invention to reduce the sensitivity of low level FET amplifiers to variations in FET threshold voltage.
It is still another object of this invention to implement a low level FET amplifier and an electronic chip including a large number of FET digital logic circuits.
The foregoing objects are achieved according to the present invention as is now described. In a preferred embodiment of the invention, two input field effect transistors are arranged as a differential pair, the sources of which are connected in common to the drain of a third field effect transistor. The source of the third field effect transistor is connected to the circuit common. The outputs from the input field effect transistors are coupled to gates of output field effect transistors, whose sources are resistively coupled to the circuit common, preferrably with a fourth field effect transistor. The sources of the output field effect transistors are coupled back to the gate of the third field effect transistor, thereby providing a feedback circuit which desensitizers the amplifier to relatively wide variations in field effect transistor threshold voltage characteristics. The amplifier is preferably coupled to a pair of level detecting circuits at which each drive a latch for providing normal digital logic level output signals in response to low level signals received at the amplifier input. The pairs of latches and level detecting circuits are arranged to detect whether the input signals vary positively or negatively from a normal bias level.